Certicom Suite B Public Key IP Hardware Core Features PDF Print E-mail

The fastest and easiest way to integrate standards-based on-chip public key encryption and digital signatures


Certicom Suite B Public Key IP Cores include:

 

  • Synthesizable RTL code in VHDL or Verilog with Synopsys Design Compiler compatible timing constraints and synthesis make scripts
  • Optional gate-level netlist mapped into standard cell libraries
  • Static timing analysis scripts compatible with Synopsys PrimeTime including false and multi-cycle path exceptions
  • VHDL or Verilog test bench and test vectors complying with FIPS 186-2 and NIST 800-56
  • VHDL, Verilog or optional C behavioral core model
  • Full core documentation and functional specifications
  • Software interface specifications for optional Certicom Security Builder API